DV Engineer with DRAM Memory Controller / NoC

Location

Hyderabad, Telangana, India

Salary

Not specified

Company

Akash pawar

Job description

### Role & Company / Project Overview Mergen is hiring a Design Verification Engineer specialized in DRAM Memory Controllers and Network-on-Chip (NoC) in Hyderabad. ### Key Responsibilities & Daily Duties • Develop and implement comprehensive verification strategies for DRAM memory controllers and NoC interconnects. • Create constrained-random test environments using SystemVerilog and UVM. • Execute coverage-driven verification, analyze protocol compliance, and resolve complex defects. ### Required Qualifications, Skills & Experience • 5 to 10 years of design verification experience. • Extensive experience in DRAM memory controllers (DDR4/5, LPDDR) or NoC interconnect architectures. • Strong proficiency in SystemVerilog, UVM, and coverage metrics. ### Working Hours, Shifts & Location Details • Location: Hyderabad, Telangana, India. • Full-time engineering schedule. ### Application Instructions • Submit updated resume by email.