Design Verification (DV) Engineer with DFT

Location

Hyderabad, Telangana, India

Salary

Not specified

Company

Akash pawar

Job description

### Role & Company / Project Overview Mergen is looking for a Design Verification (DV) Engineer with DFT expertise in Hyderabad to verify test structures and DFT features in complex SoCs. ### Key Responsibilities & Daily Duties • Verify DFT logic, scan chains, ATPG patterns, MBIST, and test control logic using simulation environments. • Develop verification test suites to validate DFT modes and functional transitions. • Debug pattern mismatches and timing issues in gate-level simulations. ### Required Qualifications, Skills & Experience • 5 to 10 years of experience combining Design Verification and DFT methodologies. • Proficiency with SystemVerilog, UVM, scan, and testbench development. • Strong analytical and problem-solving skills. ### Working Hours, Shifts & Location Details • Location: Hyderabad, Telangana, India. • Full-time engineering position. ### Application Instructions • Qualified candidates should submit their resumes via email.