Memory Layout Design Engineer
- Location
- Bangalore, Karnataka, India
- Salary
- Not specified
- Company
- Akash pawar
Job description
• Role & Company / Project Overview: SmartSoCs is hiring skilled Memory Layout Design Engineers to join their semiconductor team in Bangalore. The role involves working on cutting-edge memory technologies and custom memory layout design using advanced technology nodes. • Key Responsibilities & Daily Duties: - Design layouts for SRAM / CAM / RF custom and compiler memories using advanced technology nodes. - Develop key memory architecture building blocks, including Row Decoder, I/O, and Control circuitry. - Perform pitched layout design and floor planning for placement, power, and global routing. - Ensure strict compliance with Electromigration and IR (EM/IR) requirements. - Handle compiler-level integration and final physical verification of custom and compiler memories. - Address CMOS fabrication challenges across advanced technology nodes. • Required Qualifications, Skills & Experience: - 4 to 8 years of hands-on experience in Memory Layout Design and Physical Verification. - High proficiency in Cadence Virtuoso, Mentor Graphics Calibre, and ICV. - Strong expertise in physical verification: DRC, LVS, ERC, Antenna, Electromigration (EM), and Softcheck. - Hands-on experience in floor planning, hierarchical layout, and chip integration. - Solid understanding of memory architecture, layout topology, RC requirements, and signal/power routing. - Strong knowledge of CMOS fabrication processes, foundries, and advanced technology nodes. - Excellent problem-solving, logical reasoning, and communication skills. - Experience with memory compilers is an added advantage. - Notice period: 0 to 30 days (Immediate joiners preferred). • Working Hours, Shifts & Location Details: - Location: Bangalore, Karnataka. • Compensation & Benefits: - Competitive compensation based on industry standards. • Application Instructions: - Share your updated resume with the recruitment team via the designated email address.