Full Chip Physical Verification Lead

Location

Chennai, Tamil Nadu, India

Salary

Not specified

Company

akash pawar

Job description

Role & Company / Project Overview: We are hiring a Full Chip Physical Verification Lead to drive physical verification signoff for complex SoCs. Key Responsibilities & Daily Duties: • Drive full-chip PV signoff for complex SoCs. • Execute and manage layout verification methodologies and tapeout flows. • Independently debug and resolve DRC, LVS, and ERC violations. • Lead top-level signoff and tapeout activities across the design cycle. Required Qualifications, Skills & Experience: • 7+ years of relevant experience in physical verification. • Strong expertise in layout verification methodologies and tapeout flows. • Proven ability to independently debug and resolve DRC/LVS/ERC violations. • Demonstrated experience in top-level signoff and tapeout activities. • Notice period: Immediate to 15 days preferred. Working Hours, Shifts & Location Details: • Location: Chennai, Tamil Nadu, India • Work model: On-site Application Instructions: Interested candidates ready to take on this challenge should submit their profile directly.