Design Verification Engineer (SoC and Subsystem)
- Location
- Bangalore, Karnataka, India
- Salary
- Not specified
- Company
- Akash pawar
Job description
• Role & Company / Project Overview: Lancesoft is seeking an experienced Design Verification Engineer (SoC and Subsystem) to be based in Bangalore, working on complex semiconductor verification projects. • Key Responsibilities & Daily Duties: - Develop testbenches, verification components, and complete environments for SoC and subsystem level verification. - Create test plans, write functional assertions, and achieve 100% functional and code coverage closure. - Debug failing simulation test cases in collaboration with RTL design engineers. • Required Qualifications, Skills & Experience: - 5+ years of relevant design verification experience. - Mandatory Key Skills: SystemVerilog, UVM, SVA (SystemVerilog Assertions), and Functional Coverage. - Notice Period: Immediate to 30 Days. • Working Hours, Shifts & Location Details: - Location: Bangalore, Karnataka, India (Onsite). - Full-time work schedule. • Compensation & Benefits: - Not specified. • Application Instructions: - Please share your updated resume via email.