Physical Design Engineer (Low Power/CLP)

Location

Noida, Uttar Pradesh, India

Salary

Not specified

Company

akash pawar

Job description

### Role & Company / Project Overview Incise Infotech Limited is seeking trained engineers to join their semiconductor team in Noida as a Physical Design Engineer specializing in Low Power / CLP (Conformal Low Power). ### Key Responsibilities & Daily Duties • Execute physical design flows including synthesis, floorplanning, placement, clock tree synthesis (CTS), and routing. • Focus on low power design practices and low power verification (CLP/UPF/CPF). • Leverage Python scripting for process automation, flow enhancements, and data parsing. ### Required Qualifications, Skills & Experience • Hands-on training in Physical Design methodologies with a focus on Low Power / CLP techniques. • Mandatory proficiency in Python scripting. • Solid understanding of static timing analysis (STA), DRC/LVS, and physical verification concepts. ### Working Hours, Shifts & Location Details • Location: Noida, Uttar Pradesh, India. • Work setup: On-site. ### Application Instructions Interested trained engineers can share their updated resumes for review.