Physical Design Engineer (PnR & Implementation)
- Location
- NCR, Delhi, India
- Salary
- Not specified
- Company
- akash pawar
Job description
• Role & Company / Project Overview: LeadIC Design Pvt. Ltd. is hiring skilled Physical Design Engineers to work on cutting-edge ASIC/SoC design implementation and place-and-route flows. • Key Responsibilities & Daily Duties: - Execute end-to-end Place & Route (PnR) and physical implementation from netlist to GDSII. - Perform floorplanning, clock tree synthesis (CTS), routing, timing closure (STA), and signal integrity optimization. - Carry out physical verification including DRC, LVS, ERC, and power grid / IR drop analysis. • Required Qualifications, Skills & Experience: - 4+ to 15 years of industry experience in ASIC physical design and implementation. - Proven expertise in industry-standard PnR tools, timing closure methodologies, and advanced semiconductor nodes. • Working Hours, Shifts & Location Details: - Location: NCR / Multiple locations across India / Global opportunities. - Notice Period: Immediate to 90 days. • Application Instructions: - Send your updated CV to the recruiter via email.