Job Details
Location: Bangalore, Karnataka, India
Salary: Not specified
Company: ApnaWorker
We are actively looking for Verification Engineers with strong expertise in IP-Level and SoC Integration-Level Verification to work on cutting-edge semiconductor and high-performance silicon products. The ideal candidate should possess hands-on experience in UVM-based verification methodologies, SystemVerilog, protocol verification, and verification closure for complex IPs and SoCs. Key skills include SystemVerilog, UVM Methodology, IP-Level Verification, SoC / Integration-Level Verification, Verification Environment Development, Testbench Architecture, Constrained Random Verification, Functional Coverage, Assertions (SVA), and Debugging & Root Cause Analysis. Technical expertise requires UVM-Based Verification Frameworks, Verification Planning and Execution, Test Case Development, Functional and Code Coverage Analysis, Coverage Closure, Regression Management, Protocol Compliance Verification, Simulation and Debug, and Verification Sign-Off Activities. Experience with High-Speed Protocols like PCIe (Gen3 / Gen4 / Gen5), Ethernet (10G / 25G / 100G), AXI / AMBA Protocols, DDR Memory Interfaces, CXL (Preferred), NVMe (Preferred), and High-Speed Serial Interfaces is required. Preferred skills include ASIC / SoC Verification Experience, Exposure to Emulation and FPGA Prototyping, Networking, Datacenter, Storage, or AI/ML Accelerator Domains, Experience with Synopsys, Cadence, or Siemens EDA Verification Tools, and Strong scripting skills in Python, Perl, or Shell. What we are looking for are Engineers passionate about solving complex verification challenges, strong protocol knowledge and debugging capabilities, experience in driving verification closure independently, ability to collaborate with Design, Architecture, and Validation teams, and focus on delivering high-quality silicon and first-pass success.