ASIC Synthesis Engineer - Bangalore

Location

Bangalore, Karnataka, India

Salary

Not specified

Company

Akash pawar

Job description

Innosilica is seeking an experienced ASIC Synthesis Engineer with over 3 years of relevant experience to join our growing VLSI team in Bangalore. The successful candidate will perform RTL synthesis using Synopsys Design Compiler (DC), Fusion Compiler (FC), or Cadence Genus, develop and maintain SDC constraints, and optimize QoR including timing, area, power, and design rule violations. Additional responsibilities include multi-mode multi-corner (MMMC/MCMM) synthesis, timing analysis, RTL-to-Gate handoff support, LEC/Formal Verification, and Tcl/Python/Perl automation scripting.