RTL & FPGA Engineer - Bangalore

Location

Bangalore, Karnataka, India

Salary

Not specified

Company

Akash pawar

Job description

• Role & Company / Project Overview: Kea Semiconductors is hiring experienced RTL & FPGA Engineers to join its engineering team in Bangalore to design and prototype high-performance digital systems. • Key Responsibilities & Daily Duties: - Develop, integrate, and verify RTL code for ASIC and FPGA designs using Verilog/SystemVerilog. - Perform FPGA synthesis, place and route, timing analysis, and hardware bring-up/validation. - Collaborate with architecture and verification teams to ensure design specifications are met. • Required Qualifications, Skills & Experience: - 4+ years of relevant experience in RTL design and FPGA implementation. - Strong expertise in SystemVerilog/Verilog, FPGA toolchains (Xilinx/Altera), and digital architecture. - Excellent debugging skills on hardware prototypes and logic analyzers. • Working Hours, Shifts & Location Details: - Location: Bangalore, Karnataka, India. - Full-time schedule in an engineering environment. • Compensation & Benefits: - Competitive package in line with industry standards. • Application Instructions: - Submit your resume to the email provided to be considered.