Sr Staff Engineer Design Verification - Austin, TX
- Location
- Austin, Texas, United States
- Salary
- Not specified
- Company
- akash pawar
Job description
Role & Company / Project Overview: Skalen Semi is hiring a Sr Staff Engineer Design Verification for a Mid-Sized Semiconductor Product Startup. This is a full-time direct client engagement requiring deep expertise in ASIC/SoC functional verification. Key Responsibilities & Daily Duties: • Lead and execute design verification activities for complex semiconductor/SoC products. • Develop verification testbenches, test plans, and functional coverage models utilizing SystemVerilog and UVM. • Implement assertions (SVA) and functional verification tests across standard interconnects and protocols. • Verify standard bus protocols and high-speed interfaces such as AMBA (AXI, AHB, APB), PCIe, USB, and Ethernet. • Perform regression runs, debug failures down to RTL, and achieve closure on functional and code coverage. Required Qualifications, Skills & Experience: • 8+ years of relevant experience in Design Verification / VLSI. • Strong hands-on expertise in SystemVerilog, UVM, and SVA. • In-depth knowledge of functional verification, ASIC verification, and SoC verification methodologies. • Experience with interface protocols including AMBA (AXI/AHB/APB), PCIe, USB, and Ethernet. • USA Work Authorization: Candidates must be authorized to work in the U.S. without current or future visa sponsorship. U.S. Citizens, Green Card holders, and other candidates with valid independent U.S. work authorization are welcome. Working Hours, Shifts & Location Details: • Fully Onsite work arrangement in Austin, Texas. Application Instructions: Interested and qualified candidates should apply by sending their profile directly to the recruiter.